1. Field of the Invention
This invention relates to a display apparatus. More particularly, the present invention relates to a ultra-high resolution display apparatus having a high driving frequency.
2. Description of the Related Art
CRT (Cathode Ray Tube) display apparatuses have long been predominant as display apparatuses but LCD (Liquid Crystal Display) has gained an increasing application in recent years. Further, PDP (Plasma Display Panel) and FED (Field Emission Display) have now been put on the market.
All of these current display apparatuses have employed a display system that scans pixels and lines in a transverse direction and in a longitudinal direction to display one frame (one screen) such as a line scanning system and a pixel scanning system. This is partly because display data for one screen is transferred by the dot sequential system.
Initially, explanation will be given on a liquid crystal display apparatus of a TFT (Thin Film Transistor) active matrix driving system according to the prior art.
The line scanning system is employed for driving the TFT active matrix liquid crystal display apparatus. Display data for one row transferred by the pixel sequential system is stored in a signal driver and is outputted to a signal line in synchronism with a scanning pulse applied to a scanning line. In each scanning line, a scanning pulse is applied from above to below of a panel once per one frame time. As a display signal is written to pixels connected to each scanning line, one screen is constituted.
One frame time is generally about 1/60 sec. In a liquid crystal display apparatus having a pixel construction of 1,024×768 dots, therefore, 768 gate wires are scanned within one frame. When a non-display period is taken into consideration, the time width of one scanning pulse is about 20 μsec.
A gate electrode voltage of a TFT rises in the pixel to which this scanning pulse is applied and the TFT is turned ON. At this time, a liquid crystal driving voltage applied to the signal line is applied to a display electrode through the source and the drain of the TFT. A pixel capacitance as the sum of a liquid crystal capacitance formed between the display electrode and an opposing electrode formed over an opposing substrate and a storage capacitance arranged on the pixel is charged within the 20 μsec time described above.
On the other hand, a display apparatus using the CRT does not employ the line sequential system but employs the pixel sequential system that executes scanning both longitudinally and transversely by use of the transferred display data as beam spots. In this case, too, one frame time is about 1/60 sec. In a pixel construction of 1,024×768 dots, the time required for depicting one transverse line is about 20 μsec. PDP, too, employs fundamentally the line sequential driving system.
Higher computerization in recent years has required the increase of display capacity from such display apparatuses. The requirements include, for example, the increase of a display information quantity by achieving high resolution images, the improvement of still image reproducibility by achieving higher density and the improvement of motion picture quality by attaining a higher driving frequency.
The increase of the quantity of information to be displayed calls for the increase of the band of a transmission system from an image output source to the display apparatus. On the side of the display apparatus that receives the display data, too, the increase of the processing capacity is necessary for a processing circuit that converts the reception data to a form suitable for the display apparatus. Further, the improvement of the processing capacity is necessary for a driving method in the display apparatus. According to the conventional TFT active matrix driving system, for example, the time width of the scanning pulse becomes smaller with the increase of high resolution pixels to be displayed in order to conduct such an operation. In other words, the pixel capacitance must be charge within a shorter time. To cope with high-speed motion images, one frame time must be further reduced. In this case, too, the time width of the scanning pulse becomes smaller. The liquid crystal driving voltage is supplied from a driving circuit disposed at one of the end portions through a signal electrode line. In this case, a delay develops in the liquid crystal driving voltage supplied to the pixel capacitance due to a wiring delay of the signal electrode line. To conduct normal display, the pulse time width must have a sufficient time margin to cope with this delay time. Nonetheless, the conventional line sequential driving system cannot sufficiently secure this time width when high precision or high-speed motion image display is conducted, and sometimes fails to normally display the images.
As described above, the following three principal problems must be solved to increase the quantity of information to be displayed, that is, (1) the improvement of the substantial transfer capacity of the display data, (2) the increase of the processing capacity of the data processing circuit of the display apparatus and (3) the increase of the display capacity of the display apparatus.
(1) To improve the substantial transfer capacity of the display data, a PV link system for transferring only the data of the image region that exhibits any change in comparison with one previous frame, and a transfer system that compresses the images to such an extent that compression is not noticeable to human eyes, have been proposed as described in SID′ 00DIGEST p. 39.
As to (3) the increase of the display capacity of the display apparatus, JP-A-11-75144, for example, describes a display method capable of rewriting images at a high speed to cope with the increase of a refresh rate. According to this method, two memories and means for driving a pixel in accordance with the memory content are provided to each pixel of an optical spatial modulation device, data is written in advance into the first memory inside the pixel for all the pixels that constitute the image to be displayed, the data is then transferred altogether from the first memory to the second memory, the driving means controls at a high speed ON/OFF of light in each pixel in accordance with the data of the second memory and images of multiple gray scales are thus displayed by pulse width modulation (PWM).
When the conventional display apparatus receives the image data by the PV link system or the image compression system described above, however, the processing capacity of the processing circuit must be greatly increased as the problem (2) because the received data cannot be displayed as such on the display apparatus. Since no measure is taken to cope with the problem (3), it is not clear whether or not the image can be normally displayed.
When the method disclosed in JP-A-11-75144 described above is used for the problem (3), the transferred display data cannot be displayed as such because this method uses pulse width modulation (PWM) as the multi-gray scale display method. This means that the processing capacity must be drastically increased as the problem (2), but the drastic increase of the processing circuit in turn results in a drastic increase of the cost of production.